Prior art FIG. 1 illustrates a system 100 for driving a memory circuit 102 in an active termination mode, in accordance with the prior art. As shown, the system 100 includes a memory circuit 102 [e.g. dynamic random access memory (DRAM), etc.]. Such memory circuit 102 is accessible by a plurality of transmission lines 106 which are capable of being strobed 104 in the manner shown. For reasons that will soon become apparent, such transmission lines 106 are each equipped with a pull up resistor 108 for supporting such active termination mode.
Prior art FIG. 2 illustrates a signal 200 for driving a memory circuit such as the one in FIG. 1, in accordance with the prior art. As illustrated, the signal is strobed during an active time period 202, during which a plurality of transitions (e.g. 6 shown) occur. Such transitions, in turn, effect the reading/writing of the memory circuit 102. One purpose of the aforementioned pull up resistor 108 of FIG. 1 is to help maintain the signal 200 in an active state 204 between strobes. Such pull up resistor 108 is typically in the realm of 40 Ohms, but may vary in different designs.
While fast, the foregoing system 100 of FIG. 1 consumes much power in such active termination mode. One potential way of reducing such power (at the cost of performance), is to operate in a non-active termination mode without the resistor 108 of FIG. 1. However, any attempt to do so results in a decay 206 of the signal 200 between the activation thereof. Unfortunately, if a time between strobes is sufficient, the foregoing decay 206 potentially results in the appearance of an additional unwanted transition 208 which, in turn, results in inaccuracies when driving the memory circuit 102.